Silicon Physical Design Engineer
Company: Facebook
Location: Redmond
Posted on: January 11, 2021
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Job Description:
The Facebook Reality Labs Silicon team focuses on delivering
Facebook's vision through Augmented Reality (AR). Compute power
requirements of Augmented Reality require custom silicon. Facebook
Silicon team is driving the state of the art forward with
breakthrough work in computer vision, machine learning, mixed
reality, graphics, displays, sensors, and new ways to map the human
body. Our chips will enable AR devices where our real and virtual
world will mix and match throughout the day. We believe the only
way to achieve our goals is to look at the entire stack, from
transistor, through architecture, firmware, and algorithms. We are
looking to hire an experienced silicon physical design technical
lead to support our efforts in this regard.* Develop and own
physical design implementation of multi-hierarchy low-power designs
including physical-aware logic synthesis, design for testability,
floorplan, place and route, static timing analysis, IR Drop, EM,
and physical verification in advanced technology nodes.* Resolve
design and flow issues related to physical design, identify
potential solutions, and drive execution.* Deliver physical design
of an end-to-end IP or integration of ASIC/SoC design.* Bachelor's
degree in Electrical Engineering or equivalent similar experience.*
10+ years experience in physical design.* Understanding of
RTL2GDSII flow and design tapeouts in 16nm/14nm or below process
technologies.* Experience with low power implementation, power
gating, multiple voltage rails, UPF/CPF knowledge.* Experience
working with EDA tools like DC/Genus, ICC2/Innovus, Primetime,
Redhawk/Voltus or Calibre.* Experience running physical-aware logic
synthesis and achieving optimal synthesis QoR on low power
designs.* Knowledge of static timing analysis and concepts,
defining timing constraints and exceptions, corners/voltage
definitions.* Experience in Block-level and Full-chip
floor-planning and power grid planning.* Experience with custom or
regular clock tree synthesis implementation at block level or top
level, and clock power reduction techniques.* Experience with
Python, TCL, Perl programming.Facebook's mission is to give people
the power to build community and bring the world closer together.
Through our family of apps and services, we're building a different
kind of company that connects billions of people around the world,
gives them ways to share what matters most to them, and helps bring
people closer together. Whether we're creating new products or
helping a small business expand its reach, people at Facebook are
builders at heart. Our global teams are constantly iterating,
solving problems, and working together to empower people around the
world to build community and connect in meaningful ways. Together,
we can help people build stronger communities - we're just getting
started.Facebook is proud to be an Equal Opportunity and
Affirmative Action employer. We do not discriminate based upon
race, religion, color, national origin, sex (including pregnancy,
childbirth, or related medical conditions), sexual orientation,
gender, gender identity, gender expression, transgender status,
sexual stereotypes, age, status as a protected veteran, status as
an individual with a disability, or other applicable legally
protected characteristics. We also consider qualified applicants
with criminal histories, consistent with applicable federal, state
and local law. Facebook is committed to providing reasonable
accommodations for candidates with disabilities in our recruiting
process. If you need any assistance or accommodations due to a
disability, please let us know at accommodations-ext@fb.com.
Keywords: Facebook, Redmond , Silicon Physical Design Engineer, Engineering , Redmond, Washington
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