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FPGA Lead Verification Engineer

Company: Facebook Technologies, LLC.
Location: redmond
Posted on: May 3, 2021

Job Description:

As the FPGA Lead Verification Engineer, you will be working within the FRL FPGA development team to build advanced AR/VR rapid prototyping platforms. You will be responsible for creating and maintaining a robust verification plan and flow for validating FPGA builds to ensure proper prototype functionality, reliability and stability. This will require communicating and collaborating across functional teams to extract coverage requirements, use cases and performance targets in order to build a simulation/verification system/platform and an execution schedule. You will be responsible for developing a flexible verification platform suitable for a wide range of test/simulation scenarios and methodologies - including but not limited to: hardware co-simulation, high level system-c modelling, and hardware level testing. You will work closely with the FPGA team to design & debug test cases and assist on system characterization.

Responsibilities

  • Develop FPGA test/verification plan/flow/methodology including both simulation and hardware test
  • Collaborate across functional teams to gather verification requirements/scope/targets
  • Develop and maintain verification plan execution schedule
  • Execute FPGA test/verification plan consistent with each new FPGA build/release
  • Direct contingent/contract verification resources in support of verification plan execution
  • Collaborate in a team environment across multiple engineering disciplines
  • Develop component and system level verification plan/specifications

Minimum Qualifications

  • 5+ years of FPGA or equivalent verification experience
  • Experience with System Verilog and coding skills
  • Experience with commercial simulators (Xcelium/Incisive, Modelsim/Questa, VCS, or Riviera)
  • Experience with scripting in TCL, Python or equivalent
  • BS Electrical Engineering (EE), Computer Engineering (CE) or Computer Science (CS) or equivalent experience

Preferred Qualifications

  • 10+ years of FPGA experience
  • Experience developing verification environments/methodologies from scratch
  • Experience with Python3 scripting
  • Experience leading small teams of FPGA verification designers
  • Experience with FPGA emulation platforms (HAPS, ZeBu etc.)
  • Experience with C/C++
  • Experience in both Windows and Linux environment
  • Experience with HW testing using oscilloscope and logic analyzer
  • Masters degree in EE, CE or CS or equivalent experience

Oculus is proud to be an Equal Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law.

Oculus is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com .

Keywords: Facebook Technologies, LLC., Redmond , FPGA Lead Verification Engineer, Other , redmond, Washington

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